NPU Networks provide a wide range of computing and networking services to students, faculty members, and staff. NPU Computing and Networking Services (NPU CNS) is the organization responsible for providing all computing and networking infrastructure, enterprise application services and support, instructional and electronic engineering lab operations, research group server administration and management, and user desktop support for all NPU users.
Our mission of NPU CNS is to provide computing and networking services in support of NPU's instructional and research goals, thus enabling a state-of-the-art, fully integrated and available technical infrastructure, with a proactive, rapid, knowledgeable, and helpful front-end for the needs of our students, staff, researchers, and faculty clientele.
Cadence University Program at Northwestern Polytechnic University
Northwestern Polytechnic University (NPU) has been a member of the Cadence University Program since 1997. Cadence Electronic Design Automation (EDA) tools have been used extensively by the NPU engineering faculty and students for teaching and learning purposes, particularly in VLSI, Logic Design, Logic Synthesis, ASIC/FPGA design courses as well as in various research and student capstone projects. Tools such as Verilog XL simulator, SOC Encounter, Spectre Circuit simulator and Virtuoso layout editor are among the most popular tools used. The Cadence EDA tools are installed on the NPU Unix network system with floating licenses. Students access these tools either directly on the Sun or Linux workstations or through Windows Based PCs with X-windows servers in the classrooms, Engineering laboratories, and libraries.
To better prepare students for future job opportunities in the high-tech industry, the electrical engineering department at NPU has successfully integrated many Electronic Design Automation tools, such as those from Cadence Design Systems, into the engineering curriculum.
The following is a partial list of courses that utilize Cadence Tools:
- EE461 Verilog HDL & Digital Design
- EE505 Advanced Digital IC Design
- EE508 VLSI Design - Place & Route
- EE511 Advanced Analog IC Design
- EE512 Application Specific Integrated Circuit (ASIC) Design
- EE520 Advanced FPGA Design and Implementation
- EE595 Electrical Engineering Capstone
The custom IC design courses at NPU utilize Virtuoso schematic, Virtuoso layout and Spectre circuit simulator from Cadence Custom IC and Verification bundles.
The Semi-custom IC (ASIC) design courses utilize Verilog XL, SoC Encounter and RTL Compiler from Cadence Digital IC and Verification tool bundles.
Synopsis University Program at Northwestern Polytechnic University
Get more information on the Synopsis University Program for NPU here!